4.3 Device Characterization
Table of contents
In analog IC design, accurate modeling and characterization of MOSFETs are essential to predict circuit performance under real-world conditions. The MOSFET must be analyzed across its operational regimes—using both large-signal and small-signal perspectives—while also extracting intrinsic parameters like transconductance, capacitance, noise performance, and frequency behavior.
Device characterization techniques
MOSFET characterization begins with various simulation methods that help evaluate its DC and AC behavior. A common starting point is the DC sweep, where the gate-source voltage (VGS) and drain-source voltage (VDS) are varied to extract the output and transfer characteristics. This enables the identification of the threshold voltage (Vth) and transition points between the cutoff, triode, and saturation regions.
To extract more precise performance metrics, operating point analysis (.op
) is performed. The AC analysis (.ac
) examines the frequency response, determining gain bandwidth and pole locations, which are crucial for amplifier design. Furthermore, noise analysis (.noise
) calculates the drain noise spectral density (sid
), allowing extraction of the noise factor gamma (γ), which influences the signal-to-noise ratio in analog systems.
A more advanced technique involves gm/ID characterization, where a large sweep across VGS, VDS, VSB, channel length (L), and width (W) is conducted to generate lookup tables. These tables support bias point optimization for high-performance, low-power analog designs.
Tools and simulation setup using pregive testing models in IHP
To simulate a typical testbench like dc_lv_nmos.sch
from the IHP library, first you have to launch the docker and then run the IIC-OSIC-TOOLS Docker image. Then open the Xschem and continue through this guide to simply run any test circuit provide by IHP PDK.
Step-by-Step Guide: Characterizing MOSFETs with Xschem and Ngspice
Thi is a detailed step-by-step guide to test an NMOS device (e.g., dc_lv_nmos.sch
) and extract essential large- and small-signal parameters.
1. Run the Docker image IIC-OSIC-TOOLS
2. Launch Xschem and Open Testbench
/foss/design/ {relevant directory}/ Xschem
then open test circuit by file/open/
then go to the directory of dc_lv_nmos.sch
in {}
3. Run the Simulation
- Click Netlist
- Click Simulate
- Use Wave to display:
- first load the relevant .raw file mentione in the spice file
- thne it will show the mentioned waveforms like below pic
4. Modify Parameters and Sweep
.dc VDS 0 1.2 0.01
You can change the parameters used in the simulations by adjusting them in spice file.
- Change voltages or dimensions
- Re-run and observe new results
Learn More?
You can learn more about device characterization at Transistor Sizing Using gm/ID Methodology